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# 03-14
Goal: Breaking KASLR through TLB-based side channel attack
Status: Inserting Kernel Module
Progress:
- Wrote a basic kernel module
- Worked on proposal with feedback (improved version on Tuesday)
Stuck on: How to check if loading the module forces 4kB mapping as expected
- Herbert: https://github.com/HyperDbg/HyperDbg/blob/1a5c316ba63dea74d5c672cc6d15b09fece7ccda/hyperdbg/hyperhv/code/memory/MemoryMapper.c#L525
# 03-07
Goal: Breaking KASLR through TLB-based side channel attack
Status: Proposal draft and setting up machine